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HMUA-SR-B1_Datasheet PDF

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Large, high voltage rechargeable battery systems are now common sources of power in applications ranging from electric vehicles to power grid load leveling systems. These large battery stacks are composed of series / parallel arrays of individual battery cells and are capable of storing enormous amounts of energy (tens of kilowatt-hours). Lithium polymer or LiFePO4 cells are common technology choices due to their high energy density and high peak power capability. As in single-cell applications, careful control of the charging and monitoring of the cells is essential to ensure safe operation and prevent premature aging or damage to the battery. However, unlike single-cell systems, series-connected battery stacks present an additional requirement: cell balancing.

All series-connected cells need to be balanced The cells in a battery stack are balanced” when every cell in the stack possesses the same state of charge (SoC). SoC refers to the current remaining capacity of an individual cell relative to its maximum capacity as the cell charges and discharges. For example, a 10A-hr cell with 5A-hrs of remaining capacity has a 50-percent state of charge. All battery cells must be kept within an SoC range to avoid damage or lifetime degradation. The allowable SoC min and max levels vary from application to application. In applications where battery run time is of primary importance, all cells may operate between a min SoC of 20 percent and a max of 100 percent (or a fully charged state). Applications that demand the longest battery lifetime may constrain the SoC range from 30 percent min to 70 percent max. These are typical SoC limits found in electric vehicles and grid storage systems, which utilize very large and expensive batteries with an extremely high replacement cost. The primary role of the battery management system (BMS) is to carefully monitor all cells in the stack and ensure that none of the cells are charged or discharged beyond the min and max SoC limits of the application.

HMUA-SR-B1_Datasheet PDF

With a series/parallel array of cells, it is generally safe to assume the cells connected in parallel will auto-balance with respect to each other. That is, over time, the state of charge will automatically equalize between parallel connected cells as long as a conducting path exists between the cell terminals. It is also safe to assume that the state of charge for cells connected in series will tend to diverge over time due to a number of factors. Gradual SoC changes may occur due to temperature gradients throughout the pack or differences in impedance, self-discharge rates or loading cell to cell. Although the battery pack charging and discharging currents tend to dwarf these cell to cell variations, the accumulated mismatch will grow unabated unless the cells are periodically balanced. Compensating for gradual changes in SoC from cell to cell is the most basic reason for balancing series connected batteries. Typically, a passive or dissipative balancing scheme is adequate to re-balance SoC in a stack of cells with closely matched capacities.

As illustrated in Figure 1A , passive balancing is simple and inexpensive. However, passive balancing is also very slow, generates unwanted heat inside the battery pack, and balances by reducing the remaining capacity in all cells to match the lowest SoC cell in the stack. Passive balancing also lacks the ability to effectively address SoC errors due to another common occurrence: capacity mismatch. All cells lose capacity as they age, and they tend to do so at different rates for reasons similar to those listed above. Since the stack current flows into and out of all series cells equally, the usable capacity of the stack is determined by the lowest capacity cell in the stack. Only active balancing methods such as those shown in Figures 1B and 1C can redistribute charge throughout the stack and compensate for lost capacity due to mismatch from cell to cell.

HMUA-SR-B1_Datasheet PDF

Using a mobile CPU simulator based on an ARM-CPU architecture with Linux OS, average power and performance were calculated during application running for two kinds of applications (MPEG, video game), and compared between MRAM-based L2 cache and SRAM-based one. It has been confirmed that the power consumed in the cache memory can be reduced by over 80% without any penalty of performance, as shown in figure 17.

Figure 18 shows the data plot of power and time for MTJ programming and lines having the same PE. This figure indicates that the advanced p-MTJ in this work can reduce the power of mobile CPU more effectively than any other MTJs ever reported.